Книга: Introduction to Microprocessors and Microcontrollers
Pin layout of a DRAM
Pin layout of a DRAM
Row address strobe (RAS) and Column address strobe (CAS)
At first glance, there does not seem to be enough address pins for the number of locations to be addressed. A0 to A9 is only 10 pins, which would suggest a total of 210 or 1024 locations. The trick here is to use the same pins twice and hence load in a total 220 or 1 048 576 addresses.
The sequence of events dictates that the RAS line is taken low and the bottom half of the address is loaded into the Rows – RAS then returns high. Then the CAS is taken low while the remainder of the address is fed into the columns. After this, the state of the write line (same as R/W) determines whether data is entering or leaving the DRAM.
There is only a single bit stored in each address, the data entering via the data in (Din) pin and leaving via the data out (Dout) pin.
Оглавление книги
- A flip-flop or bistable
- A register
- Shift registers
- Rotate registers
- Memories
- RAM
- Accessing memory
- Two types of RAM
- Memory organization
- Three types of ROM
- Pin layout of an EPROM
- Pin layout of a SRAM
- Pin layout of a DRAM
- Some more memories that don’t fit into the general pattern
- Memory maps
- Quiz time 6