Книга: Introduction to Microprocessors and Microcontrollers
The XNOR (or ENOR) gate
The XNOR (or ENOR) gate
This is the inverted version of the XOR gate. These result in the output being at logic 1 only when the two inputs have the same value or are equivalent. For this reason, it is often referred to as the Equivalence gate (see Figure 5.13).
Figure 5.13 The truth table for an XNOR or equivalence gate
The tri-state buffer
This looks like a logic gate but behaves more like a switch. In Figure 5.14 we can see that it is quite simple having only an input, an output and another connection called an ‘enable’. The purpose of the enable line is to switch the buffer on or off. When the buffer is switched on, any signal applied to the input appears at the output and when it is switched off, the buffer is disconnected so that there is no output signal present.
Figure 5.14 A tri-state buffer is like a switch
So, why not just use a switch?
The problem with a switch is that, once closed, the input and output are physically joined so that input and output circuits are connected together. The buffer is a one-way device for signals so that the output is isolated from the input to prevent any changes in the next circuit from interfering with the input circuits.
Look for the circles
In the NOT, NAND NOR and XNOR gates a small circle was shown at the output to indicate that the output has been inverted. The same thing occurs with the buffer. If a circle is shown, the output is an inverted copy of the input.
We apply a similar convention to the enable input. If the input has to be a logic 1 level to switch it on, then it is as shown in Figure 5.15. If, however, the enable input has to be a logic 0 to enable it a small circle is shown at the point where the enable line connects with the buffer. When the buffer is switched off, it is said to be disabled. This would give us four possible buffers as in Figure 5.16.
Figure 5.15 An active-low tri-state buffer
Figure 5.16 The four types of tristate buffer
- 5. An introduction to logic gates and their uses
- The NOR gate
- The NOT gate
- The NAND gate
- The OR gate
- 4.4.4 The Dispatcher
- About the author
- Chapter 7. The state machine
- Appendix E. Other resources and links
- Example NAT machine in theory
- The final stage of our NAT machine
- Compiling the user-land applications